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Power Integrity & Decoupling

Bulk, Mid and High Frequency: Dividing the Work

How to split the frequency range by working from the load.

  • Lesson 7 of 10
  • Intermediate

5 min read

No single capacitor is low-impedance across the whole range a board needs. The electrolytic that holds up a 1 kHz load step is inductive by 1 MHz. The 0402 ceramic that works at 50 MHz holds almost no charge.

So the job gets divided. This lesson is about how to divide it on purpose.

The three jobs

Bulk. Holds the rail up during load steps measured in microseconds to milliseconds: a peripheral waking, a radio transmitting, a motor starting. Typically tens to hundreds of microfarads, in electrolytic, polymer or large ceramic. Physical position barely matters, because at these frequencies a few centimetres of track is electrically nothing.

Mid-frequency. Covers the gap between the bulk part going inductive and the small ceramics becoming effective. Typically 1–10 µF ceramic. Position matters somewhat. This is the band most often left empty, and it is where unexplained rail noise tends to live.

High-frequency. Supplies the per-edge transient current. Small ceramics, tens to hundreds of nanofarads, in the smallest package you can mount well. Position matters enormously — this is the only band where the lessons on geometry really bite.

BandTypical valueTypical technologyPlacement sensitivity
Bulk47–470 µFElectrolytic, polymerLow
Mid1–10 µFCeramic X7R/X5RMedium
High10–100 nFCeramic, small caseVery high

Representative ranges. The right values for your board come from your load's frequency content, not from this table.

How to decide what you need

Work from the load, not from a recipe.

Does the rail feed something with a slow, large current step? A radio module, a motor driver, a relay, a display backlight. If yes, you need bulk sized for that step. The calculation is the same as lesson 2 but with the step's own timescale: C = I × t / ΔV, where t is now microseconds or milliseconds, which is why the answer is microfarads rather than nanofarads.

Does the rail feed a switching regulator's input? Then the input capacitor is not decoupling at all — it is part of the converter's hot loop and sized by ripple current rating, not by charge. That belongs to the Switching Power course and the rules are different.

Does the rail feed fast digital logic? Then you need the high-frequency band, and lessons 3 to 5 decide whether it works.

Does the rail feed analog? Then you may care more about the regulator's PSRR and output impedance than about decoupling, and more about noise than about transient response. Different problem, different course.

Most rails need two bands. Few need all three. A board that carries bulk, mid and high on every rail without asking has spent money and board area on a default rather than a decision.

Where the ratio-of-ten habit comes from

A common pattern is 10 µF, 1 µF, 100 nF, 10 nF in descending order, one of each per supply pin.

The logic is that each part covers a decade, with its neighbours picking up where it goes inductive. It is tidy and it is sometimes right.

What it misses is that the parts only cover separate bands if their mountings differ too. Four capacitors on identical footprints with identical via patterns have similar inductances, so their self-resonant frequencies are set mostly by their capacitances — but above resonance they all look like the same inductor, and the composite impedance above the highest resonance is just that inductance divided by four.

In other words, the decade ladder helps across the middle of the range and does very little at the top. At the top, only lower inductance helps, which means geometry and package, not more values.

It also creates the anti-resonance problem, which is lesson 8.

A worked allocation

A board with a 3.3 V rail feeding an MCU, a 16-bit bus and a radio module that draws 150 mA in 50 µs bursts.

Bulk, for the radio burst. Allowing 50 mV droop: C = 0.15 A × 50 µs / 0.05 V = 150 µF. Choose 220 µF polymer, placed near the radio's supply entry rather than near the MCU.

High frequency, for the bus. From lesson 2, the bus needs about 8 nF of charge and under 0.5 nH of loop. One 100 nF 0402 per supply pin, vias at the pads, planes near the surface. The value is generous; the mounting is the constraint.

Mid-frequency. One 4.7 µF ceramic near the MCU to bridge between the two, because the polymer bulk is some distance away and goes inductive well below where the 100 nF parts take over.

Three decisions, each traceable to a load. That is the difference between a designed PDN and a populated one.

What usually goes wrong

Bulk placed far from the load that needs it. The radio's 220 µF sitting next to the MCU does nothing for the radio.

Mid-band missing entirely. Common, and it shows up as rail noise in the single-digit megahertz that nobody can attribute.

Bulk chosen by capacitance alone. An electrolytic's ESR and ripple current rating often matter more than its value, especially on a switching regulator's output.

The same ladder on every rail. A sleepy 3.3 V analog rail does not need the same treatment as a bus-driving I/O bank, and giving it one wastes area that the I/O bank needed.

What comes next

Lesson 8 takes the uncomfortable consequence of mixing values: two capacitors in parallel can produce an impedance peak that is worse than either alone.


All values here follow from a worked example. Check your device and regulator datasheets, particularly for LDO stability, which often constrains output capacitance and ESR in ways that override decoupling preferences.

Sources and further reading

Analog Devices — MT-101: Decoupling Techniques Texas Instruments — SPRAC76: Sitara Processor PDN Implementation and Analysis

Where to go next

XKEMA, in one sentence

Engineering knowledge management software for companies that develop electronic products: the product structure, its bills of materials, its documentation and its revisions, all in one place.